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1. general description the 74lvc16245a-q100; 74lvch16245a-q100 are 16-bit transceivers featuring non-inverting 3-state bus compatible outputs in both send and receive directions. the device features two output-enable (noe ) inputs for easy cascading and two send/receive (ndir) inputs for direction control. noe controls the outputs so that the buses are effectively isolated. this device can be used as two 8-bit transceivers or one 16-bit transceiver. inputs can be driven from either 3.3 v or 5 v devices. when disabled, up to 5.5 v can be applied to the outputs. these features allow the use of these devices in mixed 3.3 v and 5 v applications. the 74lvch16245a-q100 bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs. this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? 5 v tolerant inputs/outputs fo r interfacing with 5 v logic ? wide supply voltage range from 1.2 v to 3.6 v ? cmos low power consumption ? multibyte flow-through standard pinout architecture ? low inductance multiple power and grou nd pins for minimum noise and ground bounce ? direct interface with ttl levels ? high-impedance when v cc =0v ? all data inputs have bus hold (74lvch16245a-q100 only) ? complies with jedec standard: ? jesd8-7a (1.65 v to 1.95 v) ? jesd8-5a (2.3 v to 2.7 v) ? jesd8-c/jesd36 (2.7 v to 3.6 v) ? esd protection: ? mil-std-883, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with dire ction pin; 5 v tolerant; 3-state rev. 1 ? 20 november 2012 product data sheet
74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 2 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state 3. ordering information 4. functional diagram table 1. ordering information type number temperature range package name description version 74lvc16245adgg-q100 ? 40 ? c to +125 ? c tssop48 plastic thin shrink small outline package; 48 leads; body width 6.1 mm sot362-1 74lvch16245adgg-q100 74lvc16245aev-q100 ? 40 ? c to +125 ? c vfbga56 plastic very thin fine-pitch ball grid array package; 56 balls; body 4.5 ? 7 ? 0.65 mm sot702-1 74LVCH16245AEV-Q100 fig 1. logic symbol 1dir 1b0 1b1 1b2 1b3 1b4 1b5 1b6 1b7 2b0 2b1 2b2 2b3 2b4 2b5 2b6 2b7 1a0 1a1 1a2 1a3 1a4 1a5 1a6 1a7 2a0 2a1 2a2 2a3 2a4 2a5 2a6 2a7 1oe 2dir 2oe 001aaa789
74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 3 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state fig 2. iec logic symbol g3 g6 3en1[ba] 6en1[ba] 3en2[ab] 6en2[ab] 1a0 2a1 2a0 2a2 2a3 2a4 2a5 2a6 2a7 2b1 2b2 2b3 2b4 2b5 2b6 2b7 1oe 1dir 001aaa790 1a1 1a2 1a3 1a4 1a5 1a6 1a7 1b0 2b0 1b1 1b2 1b3 1b4 1b5 1b6 1b7 5 4 2 1 2oe 2dir fig 3. bus hold circuit to internal circuit mna705 v cc data input
74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 4 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state 5. pinning information 5.1 pinning fig 4. pin configuration sot362-1 (tssop48) fi g 5. pin configuration sot702-1 (vfbga56)

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74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 5 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state 5.2 pin description 6. functional description [1] h = high voltage level; l = low voltage level; x = don?t care; z = high-impedance off-state. table 2. pin description symbol pin description sot362-1 sot702-1 1dir, 2dir 1, 24 a1, k1 direction control input 1b0 to 1b7 2, 3, 5, 6, 8, 9, 11, 12 b2, b1, c2, c1, d2, d1, e2, e1 data input/output 2b0 to 2b7 13, 14, 16, 17, 19, 20, 22, 23 f1, f2, g1, g2, h1, h2, j1, j2 data input/output gnd 4, 10, 15, 21, 28, 34, 39, 45 b3, b4, d3, d4, g3, g4, j3, j4 ground (0 v) v cc 7, 18, 31, 42 c3, c4, h3, h4 supply voltage 1oe , 2oe 48, 25 a6, k6 output enable input (active low) 1a0 to 1a7 47, 46, 44, 43, 41, 40, 38, 37 b5, b6, c5, c6, d5, d6, e5, e6 data input/output 2a0 to 2a7 36, 35, 33, 32, 30, 29, 27, 26 f6, f5, g6, g5, h6, h5, j6, j5 data input/output n.c. - a2, a3, a4, a5, k2, k3, k4, k5 not connected table 3. function table [1] inputs outputs noe ndir nan nbn l l nan = nbn inputs l h inputs nbn = nan hxz z
74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 6 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state 7. limiting values [1] the minimum input voltage ratings may be excee ded if the input current ratings are observed. [2] the output voltage ratings may be exceeded if the output current ratings are observed. [3] above 60 ? c, the value of p tot derates linearly with 5.5 mw/k. [4] above 70 ? c, the value of p tot derates linearly with 1.8 mw/k. 8. recommended operating conditions table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +6.5 v i ik input clamping current v i <0v ? 50 - ma v i input voltage [1] ? 0.5 +6.5 v i ok output clamping current v o >v cc or v o <0v - ? 50 ma v o output voltage output high or low [2] ? 0.5 v cc +0.5 v output 3-state [2] ? 0.5 +6.5 v i o output current v o =0v tov cc - ? 50 ma i cc supply current - 100 ma i gnd ground current ? 100 - ma t stg storage temperature ? 65 +150 ?c p tot total power dissipation t amb = ? 40 ? c to +125 ?c; tssop48 package [3] -5 0 0m w vfbga56 package [4] -1 0 0 0m w table 5. recommended operating conditions symbol parameter conditions min typ max unit v cc supply voltage 1.65 - 3.6 v functional 1.2 - 3.6 v v i input voltage 0 - 5.5 v v o output voltage output high or low 0 - v cc v output 3-state 0 - 5.5 v t amb ambient temperature in free air ? 40 - +125 ?c ? t/ ? v input transition rise and fall rate v cc = 1.2 v to 2.7 v 0 - 20 ns/v v cc = 2.7 v to 3.6 v 0 - 10 ns/v
74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 7 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state 9. static characteristics table 6. static characteristics at recommended operating conditions. voltages are referenced to gnd (ground = 0 v). symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max v ih high-level input voltage v cc = 1.2 v 1.08 - - 1.08 - v v cc = 1.65 v to 1.95 v 0.65 ? v cc - - 0.65 ? v cc -v v cc = 2.3 v to 2.7 v 1.7 - - 1.7 - v v cc = 2.7 v to 3.6 v 2.0 - - 2.0 - v v il low-level input voltage v cc = 1.2 v - - 0.12 - 0.12 v v cc = 1.65 v to 1.95 v - - 0.35 ? v cc - 0.35 ? v cc v v cc = 2.3 v to 2.7 v - - 0.7 - 0.7 v v cc = 2.7 v to 3.6 v - - 0.8 - 0.8 v v oh high-level output voltage v i =v ih or v il i o = ? 100 ? a; v cc =1.65vto3.6v v cc ? 0.2 - - v cc ? 0.3 - v i o = ? 4ma; v cc = 1.65 v 1.2 - - 1.05 - v i o = ? 8ma; v cc = 2.3 v 1.8 - - 1.65 - v i o = ? 12 ma; v cc = 2.7 v 2.2 - - 2.05 - v i o = ? 18 ma; v cc = 3.0 v 2.4 - - 2.25 - v i o = ? 24 ma; v cc = 3.0 v 2.2 - - 2.0 - v v ol low-level output voltage v i =v ih or v il i o = 100 ? a; v cc = 1.65 v to 3.6 v --0.2 - 0.3v i o =4ma; v cc = 1.65 v - - 0.45 - 0.65 v i o =8ma; v cc = 2.3 v - - 0.6 - 0.8 v i o =12ma; v cc = 2.7 v - - 0.4 - 0.6 v i o =24ma; v cc = 3.0 v - - 0.55 - 0.8 v i i input leakage current [2] v i =5.5vorgnd; v cc =3.6v - ? 0.1 ? 5- ? 20 ? a i oz off-state output current [2] [3] v i =v ih or v il ; v o = 5.5 v or gnd; v cc =3.6v - ? 0.1 ? 5- ? 20 ? a i off power-off leakage current v i or v o =5.5v; v cc = 0.0 v - ? 0.1 ? 10 - ? 20 ? a i cc supply current v i =v cc or gnd; i o =0a; v cc =3.6v -0.120 - 80 ? a ? i cc additional supply current per input pin; v i =v cc ? 0.6 v; i o =0a; v cc = 2.7 v to 3.6 v - 5 500 - 5000 ? a c i input capacitance v cc = 0 v to 3.6 v; v i =gndtov cc -5.0- - -pf c i/o input/output capacitance v cc = 0 v to 3.6 v; v i =gndtov cc -10- - -pf
74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 8 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state [1] all typical values are measured at v cc = 3.3 v (unless stated otherwise) and t amb =25 ? c. [2] the bus hold circuit is switched off when v i >v cc allowing 5.5 v on the input terminal. [3] for i/o ports, the parameter i oz includes the input leakage current. [4] valid for data inputs of bus hold parts only (74lvch16245a -q100). note that control input s do not have a bus hold circuit. [5] the specified sustaining current at the data input holds the input below the specified v i level. [6] the specified overdrive current at the data input forces the data input to the opposite input state. 10. dynamic characteristics i bhl bus hold low current [4] [5] v cc = 1.65; v i = 0.58 v 10 - - 10 - ? a v cc = 2.3; v i = 0.7 v 30 - - 25 - ? a v cc = 3.0; v i = 0.8 v 75 - - 60 - ? a i bhh bus hold high current [4] [5] v cc = 1.65; v i = 1.07 v ? 10 - - ? 10 - ? a v cc = 2.3; v i = 1.7 v ? 30 - - ? 25 - ? a v cc = 3.0; v i = 2.0 v ? 75 - - ? 60 - ? a i bhlo bus hold low overdrive current [4] [6] v cc = 1.95 v 200 - - 200 - ? a v cc = 2.7 v 300 - - 300 - ? a v cc = 3.6 v 500 - - 500 - ? a i bhho bus hold high overdrive current [4] [6] v cc = 1.95 v ? 200 - - ? 200 - ? a v cc = 2.7 v ? 300 - - ? 300 - ? a v cc = 3.6 v ? 500 - - ? 500 - ? a table 6. static characteristics ?continued at recommended operating conditions. voltages are referenced to gnd (ground = 0 v). symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max table 7. dynamic characteristics voltages are referenced to gnd (ground = 0 v). for test circuit see figure 8 . symbol parameter conditions ? 40 ? c to +85 ? c ? 40 ? c to +125 ?c unit min typ [2] max min max t pd propagation delay nan to nbn; nbn to nan; see figure 6 [1] v cc = 1.2 v - 13.0 - - - ns v cc = 1.65 v to 1.95 v 1.5 5.2 12.2 1.5 13.8 ns v cc = 2.3 v to 2.7 v 1.0 2.8 6.0 1.0 6.7 ns v cc = 2.7 v 1.0 2.7 4.7 1.0 6.0 ns v cc = 3.0 v to 3.6 v 1.0 2.4 4.5 1.0 6.0 ns t en enable time noe to nan, nbn; see figure 7 [1] v cc = 1.2 v - 15.0 - - - ns v cc = 1.65 v to 1.95 v 1.5 5.9 15.0 1.5 16.9 ns v cc = 2.3 v to 2.7 v 1.0 3.3 7.9 1.0 8.8 ns v cc = 2.7 v 1.5 3.5 6.7 1.5 8.5 ns v cc = 3.0 v to 3.6 v 1.0 2.7 5.5 1.0 7.0 ns
74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 9 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state [1] t pd is the same as t plh and t phl . t en is the same as t pzl and t pzh . t dis is the same as t plz and t phz . [2] typical values are measured at t amb =25 ? c and v cc = 1.2 v, 1.8 v, 2.5 v, 2.7 v and 3.3 v respectively. [3] c pd is used to determine the dynamic power dissipation (p d in ? w). p d =c pd ? v cc 2 ? f i ? n+ ? (c l ? v cc 2 ? f o ) where: f i = input frequency in mhz; f o = output frequency in mhz c l = output load capacitance in pf v cc = supply voltage in volts n = number of inputs switching ? (c l ? v cc 2 ? f o ) = sum of the outputs. 11. waveforms t dis disable time noe to nan, nbn; see figure 7 [1] v cc = 1.2 v - 11.0 - - - ns v cc = 1.65 v to 1.95 v 1.0 4.9 13.1 1.0 14.7 ns v cc = 2.3 v to 2.7 v 0.5 2.7 7.1 0.5 7.9 ns v cc = 2.7 v 1.5 3.4 6.6 1.5 8.5 ns v cc = 3.0 v to 3.6 v 1.5 3.3 5.6 1.5 7.0 ns c pd power dissipation capacitance per input; v i =gndtov cc [3] v cc = 1.65 v to 1.95 v - 11.5 - - - pf v cc = 2.3 v to 2.7 v - 15.2 - - - pf v cc = 3.0 v to 3.6 v - 18.5 - - - pf table 7. dynamic characteristics ?continued voltages are referenced to gnd (ground = 0 v). for test circuit see figure 8 . symbol parameter conditions ? 40 ? c to +85 ? c ? 40 ? c to +125 ?c unit min typ [2] max min max measurement points are given in table 8 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 6. the input (nan, nbn) to output (nbn, nan) propagation delays mna477 nan, nbn input nbn, nan output t phl t plh gnd v i v m v m v oh v ol
74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 10 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state measurement points are given in table 8 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 7. 3-state enable and disable times mna362 t plz t phz outputs disabled outputs enabled v y v x outputs enabled output low-to-off off-to-low output high-to-off off-to-high noe input v i v ol v oh v cc v m gnd gnd t pzl t pzh v m v m table 8. measurement points supply voltage v m input v cc v i t r =t f v x v y 1.2 v 0.5 ? v cc v cc ? 2.5 ns v ol + 0.15 v v oh ? 0.15 v 1.65 v to 1.95 v 0.5 ? v cc v cc ? 2.5 ns v ol + 0.15 v v oh ? 0.15 v 2.3 v to 2.7 v 0.5 ? v cc v cc ? 2.5 ns v ol + 0.15 v v oh ? 0.15 v 2.7v 1.5v 2.7v ? 2.5 ns v ol + 0.3 v v oh ? 0.3 v 3.0v to 3.6v 1.5v 2.7v ? 2.5 ns v ol + 0.3 v v oh ? 0.3 v
74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 11 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state test data is given in table 9 . definitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to output impedance z o of the pulse generator. v ext = external voltage for measuring switching times. fig 8. test circuit for measuring switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aae331 v ext v cc v i v o dut c l r t r l r l g table 9. test data supply voltage input load v ext v i t r , t f c l r l t plh , t phl t plz , t pzl t phz , t pzh 1.2 v v cc ? 2 ns 30 pf 1 k ? open 2 ? v cc gnd 1.65 v to 1.95 v v cc ? 2 ns 30 pf 1 k ? open 2 ? v cc gnd 2.3 v to 2.7 v v cc ? 2 ns 30 pf 500 ? open 2 ? v cc gnd 2.7v 2.7v ? 2.5 ns 50 pf 500 ? open 2 ? v cc gnd 3.0vto3.6v 2.7v ? 2.5 ns 50 pf 500 ? open 2 ? v cc gnd
74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 12 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state 12. package outline fig 9. package outline sot362-1 (tssop48) unit a 1 a 2 a 3 b p cd (1) e (2) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.2 0.1 8 0 o o 0.1 dimensions (mm are the original dimensions). notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. sot362-1 99-12-27 03-02-19 w m a a 1 a 2 d l p q detail x e z e c l x (a ) 3 0.25 12 4 48 25 y pin 1 index b h 1.05 0.85 0.28 0.17 0.2 0.1 12.6 12.4 6.2 6.0 0.5 1 0.25 8.3 7.9 0.50 0.35 0.8 0.4 0.08 0.8 0.4 p e v m a a tssop48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm sot362-1 a max. 1.2 0 2.5 5 mm scale mo-153
74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 13 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state fig 10. package outline sot702-1 (vfbga56) 0.65 a 1 ba 2 unit d y e references outline version european projection issue date 02-08-08 03-07-01 iec jedec jeita mm 1 0.3 0.2 0.7 0.6 4.6 4.4 y 1 7.1 6.9 0.45 0.35 0.08 0.1 e 1 3.25 e 2 5.85 dimensions (mm are the original dimensions) sot702-1 mo-225 e 0.15 v 0.08 w 0 2.5 5 mm scale sot702-1 vfbga56: plastic very thin fine-pitch ball grid array package; 56 balls; body 4.5 x 7 x 0.65 mm a max. a a 2 a 1 detail x y y 1 c e e b x d e c a b c d e f h g j k 246 135 ball a1 index area b a e 2 e 1 1/2 e 1/2 e ac c b ? v m ? w m ball a1 index area
74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 14 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state 13. abbreviations 14. revision history table 10. abbreviations acronym description cdm charged device model dut device under test esd electrostatic discharge hbm human body model mm machine model ttl transistor-transistor logic mil military table 11. revision history document id release date data sheet status change notice supersedes 74lvc_lvch16245a_q100 v.1 20121120 product data sheet - -
74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 15 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 15.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? 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applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74lvc_lvch16245a_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights rese rved. product data sheet rev. 1 ? 20 november 2012 16 of 17 nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any licens e under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 15.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 16. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74lvc16245a-q100; 74lvch16245a-q100 16-bit bus transceiver with direction pin; 5 v tolerant; 3-state ? nxp b.v. 2012. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 20 november 2012 document identifier: 74lvc_lvch16245a_q100 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 6 functional description . . . . . . . . . . . . . . . . . . . 5 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 8 recommended operating conditions. . . . . . . . 6 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 7 10 dynamic characteristics . . . . . . . . . . . . . . . . . . 8 11 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 13 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 15 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 15.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 15.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16 contact information. . . . . . . . . . . . . . . . . . . . . 16 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

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